ACM3 3.0.0: model equations and characteristics

Advanced Compact MOSFET model 3 (ACM3), version 3.0.0: source models/acm3.va, module acm3_va. This page gives every equation of the released Verilog-A code, in the order in which the code evaluates them, with its parameters (Sections 1 to 18), and plots of the characteristics of an IHP SG13G2 NMOS device (Section 19). Parameter extraction from your own I-V data: Google Colab notebook.

1. Model overview

ACM3 is the third generation of the Advanced Compact MOSFET model. Like ACM2, it is charge-based: the drain current and the terminal charges are functions of the normalized inversion charge densities at the source and drain ends, $q_S$ and $q_D$, from the unified charge-control model (UCCM); all quantities are single-piece expressions from weak to strong inversion, and source and drain are interchangeable. Eight DC parameters set the drain current: $V_{T0}$ (vt0), the sheet specific current $I_{SH}$ (ish), $\phi$ (phi, two times the Fermi potential), the body-effect coefficient $\gamma$ (gamma), the mobility-reduction coefficient $\theta$ (theta), the DIBL coefficients $\sigma_{wi}$ and $\sigma_{si}$ (sigma_wi, sigma_si) and the velocity-saturation coefficient $\zeta$ (zeta); the technology supply voltage $V_{DD,max}$ (vddmax) normalizes the DIBL transition. Compared with ACM2, the slope factor depends on the gate voltage through $\phi$ and $\gamma$ (Section 7), the mobility decreases with the inversion charge (Section 10), and the DIBL coefficient changes from $\sigma_{wi}$ in weak inversion to $\sigma_{si}$ in strong inversion (Section 5).

NMOS frame. One module serves both device types. The code multiplies the terminal voltages by type (+1 NMOS, −1 PMOS), evaluates the NMOS equations, and multiplies the branch currents by type again:

$$V_{GB}=\mathrm{type}\cdot V(g_i,b),\quad V_{DB}=\mathrm{type}\cdot V(d,b),\quad V_{SB}=\mathrm{type}\cdot V(s,b),\quad V_{DS}=\mathrm{type}\cdot V(d,s),$$

$$V_{GD}=V_{GB}-V_{DB},\qquad V_{GS}=V_{GB}-V_{SB}.$$

Equivalent circuit. Terminals $d$, $g$, $s$, $b$; $g_i$ is the internal gate node, present when rg > 0. The branch contributions of the code are:

Branch Contribution Section
$d\rightarrow s$ $\mathrm{type}\cdot I_D$, thermal and flicker noise 10, 15
$g_i\rightarrow b$ $\mathrm{type}\cdot dQ_G/dt$ 12
$d\rightarrow b$, $s\rightarrow b$ $\mathrm{type}\cdot dQ_D/dt+g_{min}V(d,b)$, $\;\mathrm{type}\cdot dQ_S/dt+g_{min}V(s,b)$ 12, 16
$g_i\rightarrow d$, $g_i\rightarrow s$ $\mathrm{type}\cdot dq_{ovd}/dt$, $\;\mathrm{type}\cdot dq_{ovs}/dt$ (overlap) 14
$d\rightarrow b$, $s\rightarrow b$ $\mathrm{type}\cdot dq_{jd}/dt$, $\;\mathrm{type}\cdot dq_{js}/dt$ (junctions) 14
$g\rightarrow g_i$ $V(g,g_i)\,m/r_g$ and its thermal noise; $V(g,g_i)=0$ if $r_g=0$ 16

The intrinsic charges satisfy $Q_G+Q_B+Q_D+Q_S=0$: the model conserves charge.

2. Parameters

Instance parameters (device line)

Name Default Range Units Description
w 1e-6 (0:inf) m Channel width
l 1e-6 (0:inf) m Channel length
ad 2e-12 [0:inf) m^2 Drain diffusion area
as 2e-12 [0:inf) m^2 Source diffusion area
pd 10e-6 [0:inf) m Drain diffusion perimeter
ps 10e-6 [0:inf) m Source diffusion perimeter
m 1 [1:inf) Number of transistors in parallel
avt0 0.0 (-inf:inf) V*m VT0 mismatch coefficient
ak 0.0 [0:inf) m IS mismatch coefficient
dtemp 0.0 (-inf:inf) K Device temperature offset
rg 10 [0:inf) Ohm Gate resistance per device (divided by m); 0 removes the gate node

Model parameters (.model line). Last column: value in the IHP SG13G2 NMOS card of the plots (Section 19).

Name Default Range Units Description Card
type 1 [-1:1] exclude 0 Device type: +1=NMOS, -1=PMOS 1
vt0 0.5 [0:inf) V Threshold voltage 0.485697
ish 5e-6 (0:inf) A Sheet specific current I_SH: specific current of one device = ish*w/l 2.55139e-07
dlc 0.0 [0:inf) m Charge-length offset: lc = l - dlc in charges, capacitances, mobility and noise 9.33603e-08
sigma_wi 0.03 [0:inf) Weak inversion sigma 0.0366431
sigma_si 0.03 [0:inf) Strong inversion sigma 0.138929
zeta 0.05 [0:inf) Velocity saturation coefficient (0: none) 0.0331683
theta 0.05 [0:inf) Mobility reduction coefficient 0.0321255
gamma 0.51 [0:inf) Body-effect coefficient 0.976486
phi 0.89 [0:inf) V Two times the Fermi potential 1.46988
cj0 4e-3 [0:inf) F/m^2 Zero-bias bottom junction cap 0.00100234
cj0sw 4e-3 [0:inf) F/m^2 Zero-bias side-wall junction cap 0.000181234
xd_mj 0.5 [0:inf) Bottom junction grading coeff 0.305356
xd_mjsw 0.5 [0:inf) Side-wall junction grading coeff 0.311934
phi_zero 0.6 (0:inf) V Bottom junction built-in potential 0.624368
phi_zerosw 0.6 (0:inf) V Side-wall junction built-in potential 0.882287
xj 150e-9 [0:inf) m Junction depth 1.5e-07
ld 30e-9 [0:inf) m Gate overlap length 4.26443e-08
tox 2.2404e-9 (0:inf) m Oxide thickness 2.2404e-09
epsrox 3.97 (0:inf) Oxide relative permittivity 3.9
vddmax 1.4 [0:inf) V Technology supply voltage 1.4
tref 300.15 (0:inf) K Parameter reference temperature 300.15
alphavt0 -0.4e-3 [-1:1] V/K VT0 temperature coefficient
alphais 1.5 [0:inf) IS temperature coefficient
alphasigma 0.3e-6 [0:inf) Sigma temperature coefficient
alphazeta 0.2e-3 [0:inf) Zeta temperature coefficient
n_ot 1e12 [0:inf) m^-2 Equivalent oxide trap density

Alias: trise = dtemp.

The card is acm3n_L0p13 (cards/ihp_sg13g2/acm3_nmos_perL.lib, extracted at W = 10 µm, L = 0.13 µm, $V_{DD,max}$ = 1.4 V). Parameters that a card does not set keep the defaults above (temperature, flicker-noise and mismatch parameters are not extracted). The body bias was not measured, so $\phi$ and $\gamma$ of the cards are effective values for $V_B=0$.

3. Constants, geometry and thermal voltage

$$\varepsilon_{ox}=\mathrm{epsrox}\cdot\varepsilon_0,\qquad C_{ox}=\frac{\varepsilon_{ox}}{t_{ox}},\qquad W_e=m\,w,\qquad l_c=l-\mathrm{dlc}\;\;(\mathrm{dlc}<l),$$

$$T=T_{sim}+\mathrm{dtemp},\qquad \phi_t=\frac{kT}{q}.$$

$W_e$ is the total width of the $m$ parallel devices. The charge length $l_c$ replaces $l$ in the charges, capacitances, mobility and noise; the drawn length $l$ sets the specific current and the mismatch. $T_{sim}$ is the simulator temperature ($temperature). The drain current uses the smoothing constant $\epsilon=0.1$ (Section 10).

4. Terminal voltages

The code evaluates the type-scaled voltages of Section 1 first.

5. DIBL coefficient

The DIBL coefficient changes smoothly from $\sigma_{wi}$ below threshold to $\sigma_{si}$ at $V_{GB}=V_{DD,max}$:

$$\sigma=\sigma_{wi}+(\sigma_{si}-\sigma_{wi})\,\frac{V_{GB}-V_{T0}+\sqrt{(V_{GB}-V_{T0})^2+16\,\phi_t^2}}{V_{DD,max}-V_{T0}+\sqrt{(V_{DD,max}-V_{T0})^2+16\,\phi_t^2}}.$$

The numerator is a smooth form of $2\max(V_{GB}-V_{T0},\,0)$ with the smoothing parameter $4\phi_t$, and the denominator is its value at $V_{DD,max}$. This block uses the parameter $V_{T0}$, not $V_{T0}(T)$ of Section 6.

6. Specific current, temperature and mismatch

The specific current of one device scales with its drawn geometry through the sheet specific current $I_{SH}$ (ish): one card covers every width at its length.

$$I_S=I_{SH}\,\frac{w}{l}.$$

With $\Delta T=T-T_{ref}$ and the area $A=W_e\,l$ of the $m$ devices:

$$V_{T0}(T)=V_{T0}+\alpha_{VT0}\,\Delta T+\frac{A_{VT0}}{\sqrt{A}},\qquad I_S(T)=I_S\left(1+\frac{2-\alpha_{IS}}{T}\,\Delta T\right)+\frac{I_S\,A_K}{\sqrt{A}},$$

$$\sigma(T)=\sigma+\alpha_\sigma\,\Delta T,\qquad \zeta(T)=\max\left(\zeta+\alpha_\zeta\,\Delta T,\;0\right).$$

$\alpha_{VT0}$, $\alpha_{IS}$, $\alpha_\sigma$, $\alpha_\zeta$ are alphavt0, alphais, alphasigma, alphazeta; $\sigma$ is the gate-dependent value of Section 5. The instance parameters $A_{VT0}$ (avt0) and $A_K$ (ak) shift $V_{T0}$ and $I_S$ by amounts that scale with $1/\sqrt{\mathrm{area}}$ (Section 18). $\zeta(T)=0$ removes velocity saturation. From here on, $\sigma$ and $\zeta$ stand for $\sigma(T)$ and $\zeta(T)$.

7. Slope factor and pinch-off voltage

The pinch-off voltage follows from the body-effect model [5], with the flat-band voltage set by $V_{T0}(T)$:

$$V_{P0}=\left(\sqrt{\frac{1}{2}\left(V_{GB}-V_{FB}+\sqrt{(V_{GB}-V_{FB})^2+\phi_t^2}\right)+\frac{\gamma^2}{4}}-\frac{\gamma}{2}\right)^2-\phi,\qquad V_{FB}=V_{T0}(T)-\phi-\gamma\sqrt{\phi},$$

$$n=1+\frac{\gamma}{2\sqrt{\phi+V_{P0}}},\qquad V_P=V_{P0}+\frac{\sigma\,(V_{DB}+V_{SB})}{n}.$$

The term $\frac{1}{2}\left(V_{GB}-V_{FB}+\sqrt{(V_{GB}-V_{FB})^2+\phi_t^2}\right)$ is a smooth maximum of $V_{GB}-V_{FB}$ and 0, which continues the model into accumulation. At $V_{GB}=V_{T0}(T)$, $V_{GB}-V_{FB}=\phi+\gamma\sqrt{\phi}$ and $V_{P0}=0$ (for $V_{GB}-V_{FB}\gg\phi_t$). The slope factor $n$ depends on the gate voltage; $\sigma$ adds the drain-induced barrier lowering through the drain and source potentials.

8. Mobility and saturation velocity

The mobility follows from the specific current, $I_S=\mu\,n\,C_{ox}\,\phi_t^2\,w/(2\,l_c)$, written with the width $w$ of one device (independent of $m$) and the gate-dependent $n$ of Section 7:

$$\mu=\frac{I_S(T)\;l_c}{C_{ox}\,n\,\phi_t^2\;w/2}.$$

The velocity-saturation coefficient is $\zeta=\mu\,\phi_t/(l_c\,v_{sat})$; the charges (Section 12) use the transit-time term

$$\frac{l_c}{v_{sat}}=\frac{l_c^2\,\zeta(T)}{\mu\,\phi_t},$$

which is zero when $\zeta(T)=0$.

9. Normalized charge densities

The normalized inversion charge density is $q=Q_I'/(-n\,C_{ox}\,\phi_t)$, where $Q_I'$ is the inversion charge per unit area. At the source end, the UCCM

$$\frac{V_P-V_{SB}}{\phi_t}=q_S-1+\ln q_S$$

is solved with the Lambert function $W$, the solution of $w\,e^{w}=z$:

$$q_S=W\!\left[\exp\left(\frac{V_P-V_{SB}}{\phi_t}+1\right)\right].$$

Lambert function. The code uses the first estimate and the iteration of Iacono and Boyd [6], with three iterations:

$$a(z)=\frac{1}{1+\frac{1}{2}\ln(1+z)},\qquad w_0=\ln\left[1+a(z)\,z\right],\qquad w_{k+1}=\frac{w_k}{1+w_k}\left[1+\ln\frac{z}{w_k}\right],\quad k=0,1,2,$$

$$W(z)\simeq\begin{cases}z\left(1-z+\frac{3}{2}z^2\right), & z<10^{-8},\\[1ex] w_3, & z\ge 10^{-8}.\end{cases}$$

Below $z=10^{-8}$ the code uses the series: there, $1+a(z)\,z$ rounds to exactly one in double precision, so that $w_0=0$ and the next step, through $\ln(z/w_0)$, would be undefined.

Saturation and drain charges. As in ACM2, velocity saturation limits the drain-end charge to $q_{sat}=q_S+1+\frac{1}{\zeta}-\sqrt{\left(1+\frac{1}{\zeta}\right)^2+\frac{2q_S}{\zeta}}$, which the code evaluates without cancellation (valid for $\zeta=0$); the UCCM written between source and drain gives $q_D$:

$$q_{sat}=q_S-\frac{2\,q_S}{1+\zeta+\sqrt{(1+\zeta)^2+2\,\zeta\,q_S}},\qquad q_D=q_{sat}+W\!\left[(q_S-q_{sat})\exp\left(q_S-q_{sat}-\frac{V_{DS}}{\phi_t}\right)\right],$$

which solves $\dfrac{V_{DS}}{\phi_t}=(q_S-q_D)+\ln\dfrac{q_S-q_{sat}}{q_D-q_{sat}}$. At $V_{DS}=0$, $q_D=q_S$; in saturation, $q_D\rightarrow q_{sat}$.

10. Drain current and mobility reduction

$$I_D=m\,\frac{I_S(T)\,(q_S+q_D+2)\,(q_S-q_D)}{\left[1+\frac{\theta}{2}\,(q_S+q_D)\right]\left[1+\sqrt{\zeta^2\,(q_S-q_D)^2+\epsilon^2}\right]},\qquad \epsilon=0.1,\qquad \mu_{eff}=\frac{\mu}{1+\frac{\theta}{2}\,(q_S+q_D)}.$$

The second factor of the denominator is the velocity-saturation term $1+\zeta\,|q_S-q_D|$ with $|x|$ replaced by $\sqrt{x^2+\epsilon^2}$, so that it stays differentiable at $V_{DS}=0$, where it equals $1+\epsilon$; the extraction notebook (colab/ACM3_Parameter_Extraction.ipynb) uses the same expression. The mobility reduction $\theta$ acts through the mean normalized charge; $\mu$ without $\theta$ stays in the definition of $v_{sat}$ (Section 8), and $\mu_{eff}$ enters the noise (Section 15). The drain-to-source branch carries $\mathrm{type}\cdot I_D$; the drain terminal current also contains $g_{min}V(d,b)$ (Section 16).

11. Transconductances (operating-point outputs)

The simulator differentiates $I_D$ exactly. For the operating-point outputs gm_op, gms_op and gmd_op (of the $m$ devices), the code evaluates the expressions of ACM2 with the mobility reduction $\theta$ and the gate-dependent $n$, and the normalized virtual-charge shift of the ACM3 paper [1], which also enters the charges (Section 12):

$$q_{idsat}=\frac{I_D}{W_e\,v_{sat}\,n\,C_{ox}\,\phi_t}=\frac{\zeta\,I_D}{2\,m\,I_S(T)},$$

$$\begin{aligned}g_{ms}=\frac{2\,m\,I_S(T)}{\phi_t\left[1+\frac{\theta}{2}(q_S+q_D)\right]\left[1+\zeta(q_S-q_D)\right]^2}\Bigg\{&\left[1+q_S+\frac{\zeta}{2}(q_S-q_D)^2\right]\left(1-\frac{\sigma}{n}\right)\frac{q_S-q_{idsat}}{1+q_S-q_{idsat}}\\&+\left[1+q_D-\frac{\zeta}{2}(q_S-q_D)^2\right]\frac{\sigma}{n}\,\frac{q_D-q_{idsat}}{1+q_D-q_{idsat}}\Bigg\},\end{aligned}$$

$$\begin{aligned}g_{md}=\frac{2\,m\,I_S(T)}{\phi_t\left[1+\frac{\theta}{2}(q_S+q_D)\right]\left[1+\zeta(q_S-q_D)\right]^2}\Bigg\{&\left[1+q_S+\frac{\zeta}{2}(q_S-q_D)^2\right]\frac{\sigma}{n}\,\frac{q_S-q_{idsat}}{1+q_S-q_{idsat}}\\&+\left[1+q_D-\frac{\zeta}{2}(q_S-q_D)^2\right]\left(1-\frac{\sigma}{n}\right)\frac{q_D-q_{idsat}}{1+q_D-q_{idsat}}\Bigg\},\end{aligned}$$

$$\begin{aligned}g_m=\frac{2\,m\,I_S(T)}{n\,\phi_t\left[1+\frac{\theta}{2}(q_S+q_D)\right]\left[1+\zeta(q_S-q_D)\right]^2}\Bigg\{&\left[1+q_S+\frac{\zeta}{2}(q_S-q_D)^2\right]\frac{q_S-q_{idsat}}{1+q_S-q_{idsat}}\\&-\left[1+q_D-\frac{\zeta}{2}(q_S-q_D)^2\right]\frac{q_D-q_{idsat}}{1+q_D-q_{idsat}}\Bigg\}.\end{aligned}$$

These outputs are analytical estimates; the small-signal plots of Section 19 are numerical derivatives of $I_D$.

12. Charges

The inversion charge densities at the channel ends are $Q_{IS}'=-n\,C_{ox}\,\phi_t\,q_S$ and $Q_{ID}'=-n\,C_{ox}\,\phi_t\,q_D$. As in the ACM3 paper [1], the virtual charge densities and the linearity factor are

$$Q_{VS}'=Q_{IS}'-n\,C_{ox}\,\phi_t+\frac{I_D}{W_e\,v_{sat}},\qquad Q_{VD}'=Q_{ID}'-n\,C_{ox}\,\phi_t+\frac{I_D}{W_e\,v_{sat}},\qquad \alpha=\frac{Q_{VD}'}{Q_{VS}'},$$

with $I_D/(W_e\,v_{sat})=(l_c/v_{sat})\,I_D/(W_el_c)$ (Section 8), so that $Q_{VS}'=-n\,C_{ox}\,\phi_t\,(q_S+1-q_{idsat})$ and $Q_{VD}'=-n\,C_{ox}\,\phi_t\,(q_D+1-q_{idsat})$. The total inversion, bulk and gate charges of the $m$ devices are

$$Q_I=-n\,\phi_t\,C_{ox}W_el_c\left[\frac{2}{3}\cdot\frac{1+\alpha+\alpha^2}{1+\alpha}\,(q_S+1-q_{idsat})-1\right]-\frac{l_c}{v_{sat}}\,I_D,$$

$$Q_B=-\frac{n-1}{n}\,Q_I-C_{ox}W_el_c\left[V_{GB}-V_{FB}-(\phi+V_{P0})\right],\qquad Q_G=-Q_B-Q_I.$$

From Section 7, $V_{GB}-V_{FB}-(\phi+V_{P0})=\gamma\sqrt{\phi+V_{P0}}$ for $V_{GB}-V_{FB}\gg\phi_t$: the second term of $Q_B$ is the depletion charge of the body-effect model, and the form with $V_{GB}-V_{FB}$ continues it into accumulation. The inversion charge is split between drain and source with the Ward–Dutton partition [8] (QD_ch, QS_ch in the code):

$$Q_D=-n\,\phi_t\,C_{ox}W_el_c\left[\frac{2}{15}\,(q_S+1-q_{idsat})\,\frac{2+4\alpha+6\alpha^2+3\alpha^3}{(1+\alpha)^2}-\frac{1}{2}\right]-\frac{1}{2}\cdot\frac{l_c}{v_{sat}}\,I_D,\qquad Q_S=Q_I-Q_D.$$

$Q_{IS}'$ and $Q_{ID}'$ also enter the flicker noise (Section 15).

13. Capacitances

Exact capacitances. The simulator stamps the time derivatives of the charges of Sections 12 and 14, so the small-signal capacitances are the exact derivatives $C_{xy}=-\partial Q_x/\partial V_y$ ($x\neq y$). $C_{dg}\neq C_{gd}$: the capacitances of a charge-based model are nonreciprocal.

Operating-point estimates. For the outputs Cgs_op … Cm_op the code evaluates analytical expressions (note $q_S$ without $q_{idsat}$ in $C_{gso}$ and $C_{dso}$):

$$C_{gso}=\frac{2}{3}W_el_cC_{ox}\,\frac{(1+2\alpha)\,q_S}{(1+\alpha)^2(1+q_S)},\qquad C_{gdo}=\frac{2}{3}W_el_cC_{ox}\,\frac{(\alpha^2+2\alpha)(q_D-q_{idsat})}{(1+\alpha)^2(1+q_D-q_{idsat})},$$

$$C_{dso}=-\frac{4}{15}\,n\,W_el_cC_{ox}\,\frac{(1+3\alpha+\alpha^2)\,q_S}{(1+\alpha)^3(1+q_S)},\qquad C_{sdo}=-\frac{4}{15}\,n\,W_el_cC_{ox}\,\frac{(\alpha+3\alpha^2+\alpha^3)(q_D-q_{idsat})}{(1+\alpha)^3(1+q_D-q_{idsat})},$$

$$C_{gs}=C_{gso}\left(1-\frac{\sigma}{n}\right)-C_{gdo}\frac{\sigma}{n}+\frac{l_c}{v_{sat}}\,\frac{g_{ms}}{3n}\,\frac{(1-\alpha)^2}{(1+\alpha)^2},$$

$$C_{gd}=C_{gdo}\left(1-\frac{\sigma}{n}\right)-C_{gso}\frac{\sigma}{n}-\frac{l_c}{v_{sat}}\,\frac{g_{md}}{3n}\,\frac{(1-\alpha)^2}{(1+\alpha)^2},$$

$$C_{gb}=\frac{n-1}{n}\left(W_el_cC_{ox}-C_{gs}-C_{gd}\right),\qquad C_{bs}=(n-1)\,C_{gs},\qquad C_{bd}=(n-1)\,C_{gd},$$

$$C_{ds}=C_{dso}\left(1-\frac{\sigma}{n}\right)-\frac{l_c}{v_{sat}}\,\frac{g_{ms}}{30}\,\frac{(3\alpha+7)(1-\alpha)^2}{(1+\alpha)^3},$$

$$C_{sd}=C_{sdo}\left(1-\frac{\sigma}{n}\right)+\frac{l_c}{v_{sat}}\,\frac{g_{md}}{30}\,\frac{(3+7\alpha)(1-\alpha)^2}{(1+\alpha)^3},\qquad C_m=\frac{C_{sd}-C_{ds}}{n}.$$

These are analytical estimates; the capacitances of Section 19 are the exact derivatives of the charges, obtained from transient currents.

14. Overlap and junctions

Overlap. $C_{gs,ov}=C_{gd,ov}=C_{ox}\,m\,w\,l_d$ ($l_d$ = ld), with the charges $q_{ovs}=C_{gs,ov}V_{GS}$ and $q_{ovd}=C_{gd,ov}V_{GD}$.

Junctions. Each drain and source has a bottom junction (area ad, as) and a side-wall junction (perimeter pd, ps, depth xj), per device; the $m$ devices add their junctions. With $V=V_{DB}$ (drain) or $V_{SB}$ (source), reverse biased for $V>0$:

$$C_j(V)=\begin{cases}C_0\left(1+\dfrac{V}{\phi_0}\right)^{-m_j}, & V>0,\\[1.5ex] C_0\left(1-m_j\,\dfrac{V}{\phi_0}\right), & V\le 0,\end{cases}$$

with $C_0=\mathrm{cj0}\cdot\mathrm{ad}$, $\phi_0=$ phi_zero, $m_j=$ xd_mj for the bottom junction and $C_0=\mathrm{cj0sw}\cdot\mathrm{xj}\cdot\mathrm{pd}$, $\phi_0=$ phi_zerosw, $m_j=$ xd_mjsw for the side wall (as, ps for the source). The charges are the integrals of $C_j$ from 0 to $V$, so that $dQ/dV=C_j(V)$ on both sides of $V=0$:

$$q_{dep}(V)=\begin{cases}\dfrac{C_0\,\phi_0}{1-m_j}\left[\left(1+\dfrac{V}{\phi_0}\right)^{1-m_j}-1\right], & V>0\quad\left(C_0\,\phi_0\ln\left(1+\dfrac{V}{\phi_0}\right)\ \text{if}\ |1-m_j|<10^{-6}\right),\\[2ex] C_0\left(V-\dfrac{m_j\,V^2}{2\,\phi_0}\right), & V\le 0,\end{cases}$$

$$q_{jd}=m\left[q_{dep}^{bottom}(V_{DB})+q_{dep}^{side}(V_{DB})\right],\qquad q_{js}=m\left[q_{dep}^{bottom}(V_{SB})+q_{dep}^{side}(V_{SB})\right].$$

Cjdb_op and Cjsb_op are $m\,(C_j^{bottom}+C_j^{side})$: exact derivatives of these charges.

Terminal charges. With overlap and junctions, the charges at the four terminals are $Q_g=Q_G+q_{ovd}+q_{ovs}$, $Q_d=Q_D-q_{ovd}+q_{jd}$, $Q_s=Q_S-q_{ovs}+q_{js}$ and $Q_b=Q_B-q_{jd}-q_{js}$ in the NMOS frame (times type for the physical charges).

15. Noise

Drain-current noise from drain to source, power spectral densities in A²/Hz, with the effective mobility of Section 10:

$$S_{th}=-\frac{4kT\,\mu_{eff}\,Q_I}{l_c^2},\qquad S_{fl}(f)=\frac{q^2\,N_{ot}\,\mu_{eff}}{l_c^2\,n\,C_{ox}}\,\ln\left(\frac{nC_{ox}\phi_t-Q_{IS}'}{nC_{ox}\phi_t-Q_{ID}'}\right)\frac{I_D}{f}=\frac{q^2\,N_{ot}\,\mu_{eff}}{l_c^2\,n\,C_{ox}}\,\ln\left(\frac{1+q_S}{1+q_D}\right)\frac{I_D}{f}.$$

$Q_I<0$ is the total inversion charge of Section 12, so $S_{th}\ge 0$. The logarithm and $I_D$ have the sign of $q_S-q_D$, so $S_{fl}\ge 0$ in both directions and zero at $V_{DS}=0$. $N_{ot}$ (n_ot) is the equivalent oxide-trap density of the flicker-noise model [7]; the IHP cards keep its default. The gate resistance adds the thermal noise $4kT\,m/r_g$ of the gate branch (Section 16). Here $k$ and $q$ are P_K and P_Q.

16. Gate resistance and $g_{min}$

rg is the gate resistance of one device; the $m$ parallel gates give $r_g/m$: $I(g,g_i)=V(g,g_i)\,m/r_g$, with the thermal noise $4kT\,m/r_g$. rg = 0 connects $g$ to $g_i$ directly (no internal node). The IHP cards set rg = 0: give the gate resistance of each device on its instance line.

The simulator conductance $g_{min}$ ($simparam("gmin"), ngspice option gmin) is connected from drain and source to bulk: $g_{min}V(d,b)$ and $g_{min}V(s,b)$, with the physical voltages.

17. Temperature

Section 6 gives the temperature laws. The IHP cards do not extract the coefficients alphavt0, alphais, alphasigma and alphazeta: they keep the defaults of Section 2.

18. Mismatch

avt0 (V·m) and ak (m) shift $V_{T0}$ and $I_S$ of one instance by $A_{VT0}/\sqrt{W_el}$ and $I_S\,A_K/\sqrt{W_el}$ (Section 6); for a mismatch analysis, assign them per instance (avt0 may be negative, ak ≥ 0).

19. Characteristics

The figures are computed with ngspice 47 from models/acm3.va compiled by OpenVAF-Reloaded, with the IHP SG13G2 NMOS card acm3n_L0p13 (cards/ihp_sg13g2/acm3_nmos_perL.lib): W = 100 µm, L = 0.13 µm, ad = as = 20 µm², pd = ps = 100 µm, 27 °C, and $V_S=V_B=0$ unless a terminal is swept; Fig. 2 also uses the PMOS card of the same length. The derivatives are numerical: seven-point centered differences with a 1-mV step.

DC

ACM3 3.0.0 drain current versus gate voltage
Fig. 1. Drain current versus gate voltage for $V_{DS}$ = 0.05, 0.6, 1.2 V, on a logarithmic scale (solid, left axis) and a linear scale (dashed, right axis). Data (CSV)
ACM3 3.0.0 NMOS and PMOS output characteristics
Fig. 2. Output characteristics of the NMOS card acm3n_L0p13 (type = +1, $V_{DS}>0$) and the PMOS card acm3p_L0p13 (type = −1, $V_{DS}<0$), W = 100 µm, L = 0.13 µm, $V_S=V_B=0$: magnitude of the drain current per µm of width for $|V_{GS}|$ = 0.4, 0.6, 0.8, 1, 1.2 V. Type check: the NMOS card with type = −1 and every voltage negated gives exactly the negated terminal currents (169 bias points) and the same capacitances. Data (CSV)

Small signal

ACM3 3.0.0 gm, gm2 and gm3
Fig. 3. (a) $g_m=\partial I_D/\partial V_{GB}$, (b) $g_{m2}=\partial^2 I_D/\partial V_{GB}^2$ and (c) $g_{m3}=\partial^3 I_D/\partial V_{GB}^3$ versus gate voltage for $V_{DS}$ = 0.05, 0.6, 1.2 V. Data (CSV)
ACM3 3.0.0 drain transconductance
Fig. 4. Drain transconductance $g_{md}=\partial I_D/\partial V_D$ versus drain voltage for $V_{GB}$ = 0.4, 0.6, 0.8, 1, 1.2 V. Data (CSV)

Capacitances

ACM3 3.0.0 capacitances
Fig. 5. Capacitances normalized to the oxide capacitance of the channel $C_{ox}W l_c$ = 56.5 fF ($l_c=l-$ dlc). (a) Intrinsic capacitances $C_{xy}=-\partial Q_x/\partial V_y$ (device without overlap and junctions) versus gate voltage, from accumulation to strong inversion, at $V_{DS}$ = 0.6 V, from transient currents: terminal $y$ is ramped by ±1 mV around its bias in 1 ns, once up and once down; at mid-ramp both runs have the same conduction currents, so half the difference of the currents into terminal $x$ is the displacement current $dQ_x/dt=-C_{xy}\,dV_y/dt$. Below the flat-band voltage of the card, $V_{FB}=V_{T0}-\phi-\gamma\sqrt{\phi}$ = -2.17 V (effective $\phi$ and $\gamma$, Section 2), the surface accumulates and $C_{GB}$ tends to $C_{ox}Wl_c$. (b) Extrinsic capacitances, which add to the intrinsic ones: the overlap capacitance $C_{ox}Wl_d$ = 65.7 fF of the gate–source and gate–drain branches, independent of bias, and the drain and source junction capacitances (same layout: ad = as = 20 µm², pd = ps = 100 µm) versus their reverse voltage, with the bottom and side-wall parts (Section 14). At this bias, the drain junction is at 0.6 V and the source junction at 0 V. $r_g=0$. Data (b) (CSV) Data (CSV)

RF

ACM3 3.0.0 Y parameters
Fig. 6. Common-source short-circuit admittances from 0.1 to 30 GHz at $V_{GB}$ = 0.5707 V, $V_{DS}$ = 0.6 V, with $r_g$ = 43 Ω (gate resistance of the 10-finger layout of the LNA example): (a) magnitude and (b) phase of $Y_{11}$, $Y_{12}$, $Y_{21}$ and $Y_{22}$; gate is port 1, drain is port 2. Data (CSV)
ACM3 3.0.0 S parameters
Fig. 7. Common-source $S$ parameters ($Z_0$ = 50 Ω) from 0.1 to 30 GHz at the bias of Fig. 6: (a) $S_{11}$ and $S_{22}$ on the Smith chart, (b) magnitudes and (c) phases of $S_{21}$ and $S_{12}$. Data (CSV)

Noise

ACM3 3.0.0 drain-current noise
Fig. 8. Short-circuit drain-current noise power spectral density from 1 Hz to 30 GHz in weak ($V_{GB}$ = 0.25 V), moderate ($V_{GB}=V_{T0}$ = 0.486 V) and strong ($V_{GB}$ = 1.2 V) inversion, (a) in the triode region ($V_{DS}$ = 13 mV) and (b) in saturation ($V_{DS}$ = 1.2 V). $r_g$ = 43 Ω, with its thermal noise; flicker noise with the default $N_{ot}$ = $10^{12}$ m$^{-2}$ (not extracted for the IHP cards). Data (CSV)

References

[1] D. G. Alves Neto, M. C. Schneider, M. J. Barragan, S. Bourdel, and C. Galup-Montoro, "ACM3—An advanced compact MOSFET model for analog IC design and simulation," accepted for publication, 2026.

[2] D. G. Alves Neto, M. K. Bouchoucha, G. Maranhão, M. J. Barragan, M. C. Schneider, A. Cathelin, S. Bourdel, and C. Galup-Montoro, "Design-oriented single-piece 5-DC-parameter MOSFET model," IEEE Access, vol. 12, pp. 87420–87437, 2024, doi: 10.1109/ACCESS.2024.3417316.

[3] A. I. A. Cunha, M. C. Schneider, and C. Galup-Montoro, "An MOS transistor model for analog circuit design," IEEE J. Solid-State Circuits, vol. 33, no. 10, pp. 1510–1519, Oct. 1998.

[4] O. da Costa Gouveia-Filho, A. I. A. Cunha, M. C. Schneider, and C. Galup-Montoro, "Advanced compact model for short-channel MOS transistors," in Proc. IEEE Custom Integrated Circuits Conf., 2000.

[5] M. C. Schneider and C. Galup-Montoro, CMOS Analog Design Using All-Region MOSFET Modeling. Cambridge, U.K.: Cambridge Univ. Press, 2010, doi: 10.1017/CBO9780511803840.

[6] R. Iacono and J. P. Boyd, "New approximations to the principal real-valued branch of the Lambert W-function," Adv. Comput. Math., vol. 43, 2017, doi: 10.1007/s10444-017-9530-3.

[7] A. Arnaud and C. Galup-Montoro, "A compact model for flicker noise in MOS transistors for analog circuit design," IEEE Trans. Electron Devices, vol. 50, no. 8, pp. 1815–1818, Aug. 2003, doi: 10.1109/TED.2003.815143.

[8] S.-Y. Oh, D. E. Ward, and R. W. Dutton, "Transient analysis of MOS transistors," IEEE Trans. Electron Devices, vol. 27, no. 8, pp. 1571–1578, Aug. 1980, doi: 10.1109/T-ED.1980.20072.